The present invention relates to a semiconductor device. More specifically, it relates to a method of switching drive capability of each output terminal of the semiconductor device.
The speed of signals transmitted between semiconductor devices has been made higher with the advance of increase in speed of the semiconductor devices. The waveform of each signal transmitted between the semiconductor devices is distorted due to other factors than the semiconductor devices (e.g. a method for designing a printed circuit board, fluctuation in source voltage, etc.). Specifically, there may arise a case where signals cannot be transmitted correctly due to the influence of an overshoot or undershoot.
Ordinarily, in a system including semiconductor devices, a transmitter-side first semiconductor device is connected to a receiver-side second or third semiconductor device. On this occasion, matching a transmission line between the first semiconductor device and the second semiconductor device with characteristic impedance of each of the semiconductor devices permits the waveform of each transmission signal to be prevented from being distorted (Patent Document 1).
When the receiver-side second and third semiconductor devices are connected to the transmitter-side first semiconductor device, it is possible to achieve impedance matching between the first and second semiconductor devices and impedance matching between the first and third semiconductor devices individually but it is difficult to achieve impedance matching so simultaneously as to satisfy both.
For example, this goes for the case where a high-speed clock synchronous flash memory or an asynchronous peripheral device as the second or third semiconductor device is connected to the transmitter-side first semiconductor device.
FIG. 2 is a view showing the configuration of a system including semiconductor devices 100, 160 and 170 according to the background art. In the background art, drive capabilities of output terminals 130 in the transmitter-side first semiconductor device 100 are determined based on the contents of setting registers 200 independently of control information.                [Patent Document 1] JP-A-5-166931        [Patent Document 2] JP-A-2000-132975        
In the system design according to the background art, the drive capability of each output terminal 130 of the transmitter-side first semiconductor device 100 is designed or set to match with one of the receiver-side semiconductor devices 160 and 170 requiring the largest drive capability.
On this occasion, to solve the problem of an overshoot or undershoot in the case where the drive capability is higher than what is required, measures such as insertion of damping resistors in transmission lines are taken for impedance matching so that waveform shaping is performed in accordance with the receiver-side semiconductor device 160 or 170 to thereby secure signal transmission.
Although it is possible to secure transmission for the receiver-side second or third semiconductor device 160 or 170 by waveform shaping using damping resistors etc. or measures taken only on the side of the receiver-side semiconductor device 160 or 170 (Patent Document 2), it is impossible to set the drive capability of each output terminal 130 of the transmitter-side first semiconductor device 100 to necessary and sufficient drive capability for the receiver-side second or third semiconductor device 160 or 170. Thus, there is a problem that electric power consumed by the system including the receiver-side second and third semiconductor devices 160 and 170 increased.